os: processors (OS slice 3, epic) #127

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opened 2026-10-05 21:07:23 +00:00 by orion · 7 comments
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Goal

Slice 3 of docs/design/OS.md section 10: the processors of std/os (Processor, ProcessorDescription, ProcessorTimes, ProcessorUsage, Frequency) on every supported system, as section 4 (Frequency), 5.2 and 7 specify.

Source

Epic: why, and the steps

The slice spans five runtime files, three TorbScript layers and the x86/ decoders: more than one PR of one or two commits. Per the definition of ready it is an epic; this issue carries no ready label and each step is filed when it starts next.

  • Step 1: Frequency, logicalCount, physicalCount, times, timesOfEach, usage (#488)
  • Step 2a (#538): x86/ natives and pure decoders (vendor, brand, topology, caches, features), tested with captured register values
  • Step 2b (#543): ProcessorDescription and Processor.describe on x86-64 (Windows, Linux, macOS), composed from the 2a decoders and the system counts; packages per system; non-x86 answers Unsupported until 2c
  • Step 2c (filed when 2b lands): Arm64 vendor, model, caches and features from the system (getauxval(AT_HWCAP), hw.optional.arm.*, IsProcessorFeaturePresent), replacing the Unsupported arms of describe
  • Step 3: frequencies and baseFrequency/maximumFrequency of describe (sysfs cpufreq, CallNtPowerInformation, hw.cpufrequency/hw.perflevel*), then mark OS.md slice 3 done with a "How slice 3 landed" note

Acceptance criteria (of the epic)

  • Steps 1 to 3 landed and their issues closed
  • OS.md slice 3 marked done, with what differs from the sections above
  • docs/standard-library/os.md documents the whole processor API

Seed impact

None expected (new std names and natives only; the compiler imports none of them). Each step says so again and falls back to the two-commit rule if CI shows otherwise.

Dependencies

#126 (OS slice 2) is closed and landed. Slices 4 to 7 (#128 to #131) do not wait on this one except #131 (FreeBSD), which replaces the Unsupported arms.

Moved from the planning lists of the docs; the design record stays the specification.

## Goal Slice 3 of `docs/design/OS.md` section 10: the processors of `std/os` (`Processor`, `ProcessorDescription`, `ProcessorTimes`, `ProcessorUsage`, `Frequency`) on every supported system, as section 4 (`Frequency`), 5.2 and 7 specify. ## Source - [OS.md slice 3](https://git.torb.dev/torbscript/language/src/commit/393ef2608e4a60b8ff76d8b6b408951b822d887d/docs/design/OS.md#L1623) ## Epic: why, and the steps The slice spans five runtime files, three TorbScript layers and the `x86/` decoders: more than one PR of one or two commits. Per the definition of ready it is an epic; this issue carries no `ready` label and each step is filed when it starts next. - [x] Step 1: `Frequency`, `logicalCount`, `physicalCount`, `times`, `timesOfEach`, `usage` (#488) - [x] Step 2a (#538): `x86/` natives and pure decoders (vendor, brand, topology, caches, features), tested with captured register values - [ ] Step 2b (#543): `ProcessorDescription` and `Processor.describe` on x86-64 (Windows, Linux, macOS), composed from the 2a decoders and the system counts; `packages` per system; non-x86 answers `Unsupported` until 2c - [ ] Step 2c (filed when 2b lands): Arm64 vendor, model, caches and features from the system (`getauxval(AT_HWCAP)`, `hw.optional.arm.*`, `IsProcessorFeaturePresent`), replacing the `Unsupported` arms of `describe` - [ ] Step 3: `frequencies` and `baseFrequency`/`maximumFrequency` of `describe` (sysfs `cpufreq`, `CallNtPowerInformation`, `hw.cpufrequency`/`hw.perflevel*`), then mark OS.md slice 3 done with a "How slice 3 landed" note ## Acceptance criteria (of the epic) - [ ] Steps 1 to 3 landed and their issues closed - [ ] OS.md slice 3 marked done, with what differs from the sections above - [ ] `docs/standard-library/os.md` documents the whole processor API ## Seed impact None expected (new std names and natives only; the compiler imports none of them). Each step says so again and falls back to the two-commit rule if CI shows otherwise. ## Dependencies #126 (OS slice 2) is closed and landed. Slices 4 to 7 (#128 to #131) do not wait on this one except #131 (FreeBSD), which replaces the `Unsupported` arms. _Moved from the planning lists of the docs; the design record stays the specification._
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[loop:torbscript] intake: in scope (author orion, label loop), source OS.md slice 3, not a duplicate. Depends on #126. next: waiting (dependency #126) until 2026-10-10T04:00:00Z

[loop:torbscript] intake: in scope (author orion, label loop), source OS.md slice 3, not a duplicate. Depends on #126. next: waiting (dependency #126) until 2026-10-10T04:00:00Z
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[loop:torbscript] claim refine by session:loop-torbscript-20261026 until 2026-10-26T02:30:00Z

[loop:torbscript] claim refine by session:loop-torbscript-20261026 until 2026-10-26T02:30:00Z
orion changed title from os: processors (OS slice 3) to os: processors (OS slice 3, epic) 2026-10-25 23:48:54 +00:00
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[loop:torbscript] decided by the loop: split slice 3 into an epic of three steps instead of one issue. Why: five runtime files (x86, windows, linux, macos, bsd), three TorbScript layers and the pure x86/ decoders exceed one PR of one or two commits. Numbers: step 1 (Frequency, counts, times, usage) touches ~3 runtime files; step 2 (describe, cpuid decoders, features) and step 3 (frequencies, done mark) follow when step 1 lands. Only step 1 is filed now (#488, ready), as the definition of ready requires; this issue stays the epic without ready. Seed impact: none expected. No duplicate among open issues (keyword search: processor, cpu, Frequency, cpuid).

[loop:torbscript] refine: #126 is closed and landed; no duplicates; issue rewritten as the epic (goal, steps, acceptance, seed impact); step 1 filed as #488 with testable criteria and set ready. next: waiting (epic; steps filed just in time, step 2 when #488 lands). ~70k tokens.

[loop:torbscript] decided by the loop: split slice 3 into an epic of three steps instead of one issue. Why: five runtime files (`x86`, `windows`, `linux`, `macos`, `bsd`), three TorbScript layers and the pure `x86/` decoders exceed one PR of one or two commits. Numbers: step 1 (Frequency, counts, times, usage) touches ~3 runtime files; step 2 (`describe`, cpuid decoders, features) and step 3 (`frequencies`, done mark) follow when step 1 lands. Only step 1 is filed now (#488, `ready`), as the definition of ready requires; this issue stays the epic without `ready`. Seed impact: none expected. No duplicate among open issues (keyword search: processor, cpu, Frequency, cpuid). [loop:torbscript] refine: #126 is closed and landed; no duplicates; issue rewritten as the epic (goal, steps, acceptance, seed impact); step 1 filed as #488 with testable criteria and set `ready`. next: waiting (epic; steps filed just in time, step 2 when #488 lands). ~70k tokens.
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[loop:torbscript] claim refine (step 1 #488 landed, cut step 2) by session:loop-torbscript-20261028 until 2026-10-28T07:15Z

[loop:torbscript] claim refine (step 1 #488 landed, cut step 2) by session:loop-torbscript-20261028 until 2026-10-28T07:15Z
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[loop:torbscript] refine: verified step 1 (#488) on main (f12a2a4d, processor.trb with Windows/Linux/macOS halves, processor.test.trb) and ticked it; step 2 exceeds one PR (natives, decoders, three per-system halves, Arm64 sources), so only sub-step 2a is filed as #538 (x86 natives and pure decoders with captured-register tests, labels loop+ready, no seed impact expected); 2b (describe wiring, per-system halves, Arm64) follows when 2a lands; no duplicates found. Claim released. next: waiting (epic; step 2a is #538, implement). ~90k tokens.

[loop:torbscript] refine: verified step 1 (#488) on main (f12a2a4d, processor.trb with Windows/Linux/macOS halves, processor.test.trb) and ticked it; step 2 exceeds one PR (natives, decoders, three per-system halves, Arm64 sources), so only sub-step 2a is filed as #538 (x86 natives and pure decoders with captured-register tests, labels loop+ready, no seed impact expected); 2b (describe wiring, per-system halves, Arm64) follows when 2a lands; no duplicates found. Claim released. next: waiting (epic; step 2a is #538, implement). ~90k tokens.
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[loop:torbscript] claim refine (step 2a #538 landed on main; cut the next step of the epic) by session:loop-torbscript-20261028 until 2026-10-28T15:30Z

[loop:torbscript] claim refine (step 2a #538 landed on main; cut the next step of the epic) by session:loop-torbscript-20261028 until 2026-10-28T15:30Z
Author
Collaborator

[loop:torbscript] refine: verified step 2a (#538) on main (acf8510: x86.c, x86/native.trb, x86/processor.trb with CpuidDump, x86.test.trb) and ticked it; cut step 2b as #543 (ProcessorDescription and Processor.describe on x86-64 on Windows, Linux and macOS with packages per system, two commits, no seed impact expected, labels loop+ready, no duplicate among open issues); Arm64 vendor, model, caches and features stay in the checklist as step 2c, filed when #543 lands; epic checklist updated. Claim released. next: waiting (epic waits on its steps, #543 next). ~120k tokens.

[loop:torbscript] refine: verified step 2a (#538) on main (acf8510: `x86.c`, `x86/native.trb`, `x86/processor.trb` with `CpuidDump`, `x86.test.trb`) and ticked it; cut step 2b as #543 (`ProcessorDescription` and `Processor.describe` on x86-64 on Windows, Linux and macOS with `packages` per system, two commits, no seed impact expected, labels loop+ready, no duplicate among open issues); Arm64 vendor, model, caches and features stay in the checklist as step 2c, filed when #543 lands; epic checklist updated. Claim released. next: waiting (epic waits on its steps, #543 next). ~120k tokens.
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